Light emitting device and fabricating method thereof

ABSTRACT

The present invention provides an inexpensive light emitting device and an inexpensive electric appliance. By reducing the number of photolithography steps in the fabrication of TFTs, the yield of the light emitting devices can be enhanced and the manufacturing period can be shortened. The present invention is substantially characterized in that a gate electrode is formed of a conductive film made of a plurality of layers and the concentration of impurity regions formed in the inside of an active layer can be adjusted by making use of the selection ratio at the time of etching these layers.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a light emitting device havingan element which sandwiches light emitting material between electrodesand an electric appliance which uses such a light emitting device as adisplay part (display or display monitor), and more particularly to alight emitting device which uses light emitting material which canobtain EL (Electro Luminescence) (called EL material hereinafter). Here,an organic EL display and an organic light emitting diode (OLED: OrganicLight Emitting Diode) are included in the light emitting device of thepresent invention.

[0003] Further, the EL material applicable to the present inventionincludes all EL materials which emit light (phosphorus light and/orfluorescence) through a singlet excitation or a triplet excitation orboth excitations.

[0004] 2. Related Art

[0005] Recently, the development of light emitting devices which useself luminous elements (called EL elements hereinafter) making use of anEL phenomenon of EL material (called EL light emitting devicehereinafter) has been in progress. Since the EL light emitting device isa display device which uses the self luminous elements, the EL lightemitting devices do not require back lights such as liquid crystaldisplays and have a large angle of visibility. Accordingly, the EL lightemitting devices are attracting attentions as a display part of aportable equipment which can be used outside.

[0006] There exist two types of EL light emitting devices, that is, apassive matrix type and an active matrix type and both of them have beenwidely developed. Particularly, recently, the EL light emitting devicesof active matrix type have been attracting attentions. The EL lightemitting device of active matrix type is characterized in that thin filmtransistors (called TFT hereinafter) are provided to respective pixelswhich constitute a pixel portion and an electric current quantitysupplied to the EL elements is controlled by the TFT.

[0007] An advantage of the active matrix type lies in the image displayof high definition which can provide images of a larger informationquantity.

[0008] However, since respective pixels require the TFTs, thefabrication process becomes complicated compared to that of the passivematrix type so that there arise problems such as the lowering of yieldand the increase of fabrication cost due to the prolonged fabricationperiod. Particularly, when there are many photolithography steps, thelowering of the yield becomes apparent so that the reduction of thephotolithography steps has been a crucial task to be solved.

[0009] The present invention has been made in view of the above and itis an object of the present invention to provide an inexpensive lightemitting device by reducing the fabrication cost which is brought aboutby the enhancement of the yield and the shortening the fabricationperiod derived from the reduction of photolithography steps. Further, itis another object of the present invention to provide an inexpensiveelectric appliance which uses an inexpensive light emitting device as adisplay part thereof.

SUMMARY OF THE INVENTION

[0010] The present invention aims at the enhancement of the yield of thelight emitting devices and the shortening of the fabrication period byreducing the photolithography steps related with the fabrication of TFT.The present invention is characterized in that a gate electrode isformed of a plural layers of conductive films and the concentrations ofimpurity regions formed in the inside of an active layer are adjusted bymaking use of the selection ratio at the time of etching the conductivefilms.

[0011] An example of fabrication steps of an n-channel type TFT whichfeatures the present invention is explained in conjunction with FIG. 1.In FIG. 1 (A), numeral 100 indicates an insulation body which may be asubstrate provided with an insulation film on a surface thereof, aninsulation substrate or an insulation film. A semiconductor film(typically a silicon film) 101 is formed on the insulation body 100 andthis semiconductor film 101 constitutes an active layer of TFT. Further,the semiconductor film 101 is covered with an insulation film 102containing silicon and this insulation film 102 constitutes a gateinsulation film of the TFT. Here, as the insulation film which containssilicon, a silicon oxide film, a silicon nitride film, a siliconnitride-oxide film or a laminated film which combines these films can beused.

[0012] Subsequently, a conductive film which is made of two or morelaminated conductive films is formed on the insulation film 102containing silicon. Here, the first conductive film 103 and the secondconductive film 104 are formed. Here, it is important that the selectionratio can be ensured between the first conductive film 103 and thesecond conductive film 104 at the time of etching. To be more specific,it is important that there exists a condition which enables the etchingof the second conductive film 104 while making the first conductive film103 remain as it is.

[0013] As typical examples, 1) a combination which uses a tantalumnitride film as the first conductive film and a tungsten film as thesecond conductive film, 2) a combination which uses a tungsten film asthe first conductive film and a aluminum alloy film as the secondconductive film, or 3) a combination which uses a titanium nitride filmas the first conductive film and a tungsten film as the secondconductive film are named.

[0014] In the combination 1), the tungsten film and the tantalum nitridefilm are etched by the combination of a chlorine (Cl₂) gas and atetrafluoro carbon (CF₄) gas and the etching rate of the tantalumnitride film can be drastically reduced by adding an oxygen (O₂) gas tothis gas system and hence, the selection ratio can be ensured.

[0015] In the combination 2), although the aluminum film is etched bythe combination of a bromine trichloride (BrCl₃) gas and a chlorine(Cl₂) gas, the tungsten film is not etched. Further, although thetungsten film is etched by the combination of a chlorine (Cl₂) gas and atetrafluoro carbon (CF₄) gas, the aluminum film is not etched. In thismanner, the selection ratio of both films can be ensured.

[0016] Subsequently, as shown in FIG. 1(B), the first conductive film103 and the second conductive film 104 are etched using a resist mask105 so as to form a gate electrode 106. In this specification, the gateelectrode obtained by etching the first conductive film is called afirst gate electrode and the gate electrode obtained by etching thesecond conductive film is called a second gate electrode. Accordingly,the gate electrode 106 is comprised of the first gate electrode 106 aand the second gate electrode 106 b.

[0017] It is preferable that the gate electrode 106 is formed into ashape having a taper depending on the etching condition. Here, the taperis a portion where an end surface at an end portion of the electrode isslanted and an angle made by the end surface and a substrate is called ataper angle. The shape having a taper is a shape where the end portionof the electrode is slanted with a given taper angle and the trapezoidis included in the shape having a taper.

[0018] Since the gate insulation film 102 is also etched at the time offorming the gate electrode 106, the film thickness of the gateinsulation film 102 is made thin. Although the film thickness may bedifferent depending on the etching condition, it is preferable tosuppress the reduction of the film thickness to 20-50 nm.

[0019] Then, under this state, the semiconductor film 101 is doped withan impurity element (called an n-type impurity element hereinafter)which forms a semiconductor into an n-type semiconductor. Here, the gateelectrode 106 is used as a mask and the n-type impurity element is dopedin a self alignment. To be more specific, an element (typicallyphosphorus or arsenic) which belongs to a group 15 of the periodic tablecan be used as the n-type impurity element.

[0020] Here, as a doping method, a known plasma doping technique or aknown ion implantation technique can be used. Further, the concentrationof the n-type impurity element doped into the semiconductor film maypreferably be 1×10²⁰-1×10²¹ atoms/cm³. Regions 107, 108 which are dopedwith the n-type impurity element in such a concentration are calledn-type impurity regions (a) in this specification.

[0021] Subsequently, as shown in FIG. 1 (C), the gate electrode 106 isfurther etched under the same condition at the time of forming the gateelectrode 106. Accordingly, side surfaces of the gate electrode 106 arefurther etched so that a gate electrode 109 with a narrowed line width(reduced contour) is formed (the gate electrode 109 being made of afirst gate electrode 109 a and a second gate electrode 109 b). Further,at this point of time, the reduction of the film thickness of the gateinsulation film 102 is in progress.

[0022] Then, during the etching of FIG. 1 (C), the etching condition ischanged to a condition in which a portion of the gate electrode 109, tobe more specific, the second gate electrode 109 is selectively etched.Such a condition may be obtained by changing an etching gas, a substratebias voltage, an electric power supplied to electrodes or the like.Here, since it is sufficient if the selection ratio between the firstgate electrode 109 a and the second gate electrode 109 b can be ensured,the etching condition can be most easily changed by changing the etchinggas.

[0023] Through these steps, as shown in FIG. 1 (D), a gate electrode 11having a laminar structure consisting of the first gate electrode 109 aand the second gate electrode 110 can be formed.

[0024] Then, a doping step of an n-type impurity element is againperformed under this state. In this doping step, an acceleration voltageis increased than the doping step of FIG. 1(B) so as to make theimpurity element reach a deep position.

[0025] Here, the n-type impurity element is doped into regions indicatedby numerals 112, 113 at the concentration of 1×10¹⁷-1×10¹⁹ atoms/cm³.Regions 112, 113 which are doped with the n-type impurity element insuch a concentration are called n-type impurity regions (b) in thisspecification.

[0026] In this doping step, a portion where the conductive films arelaminated in two or more layers, that is, a lamination portion made ofthe first gate electrode 109 a and the second gate electrode 110 becomesa mask and the n-type impurity element is doped such that the n-typeimpurity element penetrates a portion of the gate electrode that is, aportion where only the first gate electrode 109 a is exposed.

[0027] In this manner, regions indicated by numerals 114, 115 allow thedoping of the n-type impurity element penetrating the end portion of thefirst gate electrode 109 a (portion which is not brought into contactwith the second gate electrode 110) and hence, the n-type impurityelement is doped at the concentration (preferably 1×10¹⁶-1×10¹⁸atoms/cm³) lower than that of the n-type impurity region (b). Regions114, 115 which are doped with the n-type impurity element in such aconcentration are called n-type impurity regions (c) in thisspecification.

[0028] Here, a region 116 which is not doped with the n-type impurityelement is a region which functions as a channel forming region of theTFT and is formed right below the gate electrode 110.

[0029] Thereafter, as shown in FIG. 1 (E), by forming a passivation film117, an interlayer insulation film 118, and a source wiring 119 and adrain wiring 120 which are brought into contact with the semiconductorfilm which constitutes an active layer of the TFT, an n-channel type TFTis completed. As the passivation film 117, a silicon nitride film or asilicon nitride-oxide film may be used. Further, as the interlayerinsulation film 118, an inorganic insulation film, an organic insulationfilm or a lamination film made of these films may be used. As theorganic insulation film, a resin film made of polyimide, acrylic resin,polyamide or BCB (benzocyclobutene) can be used. Further, as the sourcewiring 119 and the drain wiring 120, known conductive films may be used.

[0030] In the above-mentioned fabrication steps, the photolithographysteps are made of four steps which are respectively performed at thetime of forming the semiconductor film 101, at the time of forming thegate electrode 106, at the time of forming contact holes of theinterlayer insulation film and at the time of forming the source wiringand the drain wiring. To form a CMOS circuit, since a p-channel type TFTmust be prepared, one more photolithography step becomes necessary.However, even such a case, the number of photolithography steps can berestricted to five times.

[0031] In the TFT shown in FIG. 1(E), an n-type impurities region (b)113 and an n-type impurities region (c) 115 are formed between thechannel forming region 116 and the drain region 108. Here, the n-typeimpurities region (c) 115 is superposed on the first gate electrode 109a while sandwiching the gate insulation film 102 therebetween and thisstructure is effective in preventing the hot carrier deterioration.Further, the n-type impurities region (b) 113 is a region which performsthe similar operation as that of a conventional LDD (Light Dope Drain)region.

[0032] Accordingly, in the TFT shown in FIG. 1(E), the measure to copewith the hot carrier is provided by the n-type impurities region (c) andthe measure to cope with the leak current is provided by the n-typeimpurities region (b) thus providing a highly reliable structure. Inthis manner, the TFT having such high reliability can be fabricatedthrough the five photolithography steps and hence, the yield of thewhole light emitting device including the light emitting elements can beenhanced and the fabrication period can be shortened. Still further, itbecomes possible to fabricate the light emitting device at a low costwith high reliability.

[0033] The present invention is not limited to the above-mentionedconstitution and the constitutions of embodiments which are explainedhereinafter and various modification are conceivable without departingfrom the technical concept of the present invention.

BRIEF EXPLANATION OF THE DRAWINGS

[0034] FIGS. 1(A) to 1(E) are views showing fabrication steps of ann-channel type TFT of the present invention.

[0035] FIGS. 2(A) to 2(E) are views showing a fabrication step of apixel portion and a drive circuit.

[0036] FIGS. 3(A) to 3(D) are views showing a fabrication step of apixel portion and a drive circuit.

[0037] FIGS. 4(A) and 4(B) are views showing a fabrication step of apixel portion and a drive circuit.

[0038]FIG. 5 is a view showing an upper surface structure of the pixelportion.

[0039] FIGS. 6(A) to 6(C) are views showing a cross-sectional structureof the pixel portion.

[0040]FIG. 7 is a view showing the circuit constitution of an EL lightemitting device.

[0041] FIGS. 8(A) and 8(B) are views showing an upper surface structureand a cross-sectional structure of the EL light emitting device.

[0042]FIG. 9(A) is a view showing an upper surface structure and FIG.9(B) is a cross-sectional structure of the EL light emitting device.

[0043]FIG. 10 is a view showing an upper surface structure of a pixelportion.

[0044]FIG. 11 is a view showing the upper surface structure of the pixelportion.

[0045] FIGS. 12(A) to 12(C) are views showing cross-sectional structuresof the pixel portions.

[0046] FIGS. 13(A) to 13(D) are views showing a fabrication step of thepixel portion and the drive circuit.

[0047] FIGS. 14(A) to 14(D) are views showing a fabrication step of thepixel portion and the drive circuit.

[0048] FIGS. 15(A) and 15(B) are views showing the circuit constitutionof the pixel.

[0049]FIG. 16 is a view showing the constitution of an in-line systemfilm forming device.

[0050] FIGS. 17(A) to 17(F)) are views showing a structure of an ELelement.

[0051] FIGS. 18(A) to 18(F) are views showing specific examples ofelectric appliances.

[0052] FIGS. 19(A) and 19(B) are views showing specific examples ofelectric appliances.

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0053] Preferred embodiments of the present invention are explained indetail hereinafter in conjunction with attached drawings.

[0054] Embodiment 1

[0055] This embodiment of the present invention is explained inconjunction with FIG. 2 to FIG. 4. Here, the explanation is made withrespect to a method which simultaneously fabricates a pixel portion anda TFT which constitutes a drive circuit disposed around the pixelportion. For a brevity purpose, however, with respect to the drivecircuit, a CMOS circuit which constitutes a basic unit is illustrated.

[0056] First of all, as shown in FIG. 2(A), a background film 302 havinga thickness of 300 nm is formed on a glass substrate 301. In thisembodiment, a silicon nitride-oxide film is laminated as the backgroundfilm 302. Here, it is preferable to set the nitrogen concentration of aportion of the background film 302 which is brought into contact withthe glass substrate 301 at 10-25 wt %.

[0057] Further, it is effective to make the background film 302 have aheat radiation effect and hence, it is preferable to provide a carbonfilm, particularly DLC (diamond-like carbon) film to either bothsurfaces or one surface of the substrate 301. The DLC film can be formedby either a CVD method or a sputtering method. The DLC film isadvantageous in view of the fact that the film can be formed within atemperature range from a room temperature to not more than 100° C.

[0058] Subsequently, an amorphous silicon film (not shown in thedrawing) having a thickness of 50 nm is formed on the background film302 in a known method. Here, it is unnecessary to limit such a film tothe amorphous silicon film and it is enough so long as the film is asemiconductor film including an amorphous structure (includingmicrocrystalline semiconductor film). Further, a compound semiconductorfilm including an amorphous structure such as an amorphous silicongermanium film or the like may be used. The film thickness of the filmmay preferably be 20-100 nm.

[0059] Then, using a technique described in Japanese Patent Laid-openNo.130652/1995, the amorphous silicon film is crystallized to form acrystalline silicone film (also called polycrystalline silicon film orpolysilicon film) 303. In this embodiment, nickel is used as an elementwhich promotes the crystallization. It is needless to say that a laseranneal crystallization method which uses laser beams and a lamp annealcrystallization method which uses infrared light are used as othercrystallization methods.

[0060] Subsequently, as shown in FIG. 2(B), the crystalline siliconefilm 303 is etched by a first photolithography step to form island-likesemiconductor films 304-307. These constitute the semiconductor filmswhich will later become active layers of TFTs.

[0061] Here, in this embodiment, a protective film (not shown in thedrawing) made of a silicon oxide film and having a thickness of 130 nmis formed on the semiconductor films 304-307 and then the semiconductorfilms 304-307 are doped with an impurity element which form asemiconductor into a p-type semiconductor (called p-type impurityelement hereinafter). As the p-type impurity element, an element whichbelongs to a group 13 of the periodic table (typically boron or gallium)can be used. This protective film is provided for preventing thecrystalline silicon film from directly being exposed to plasma at thetime of doping the impurity and for enabling the delicate concentrationcontrol.

[0062] Further, the concentration of the p-type impurity element dopedinto the semiconductor films 304-307 may preferably be 1×10¹⁵-5×10¹⁷atoms/cm³(typically 1×10¹⁶-1×10¹⁷ atoms/cm³). The p-type impurityelement added at such a concentration is used for the adjustment of athreshold voltage of the n-channel type TFT.

[0063] Subsequently, a gate insulation film 308 is formed such that thefilm 308 covers the semiconductor films 304-307. As the gate insulationfilm 308, an insulation film having a thickness of 10-200 nm, preferably50-150 nm and containing silicon may be used. This film 308 may adopteither a single-layer structure or a laminated structure. In thisembodiment, a silicon nitride-oxide film having a thickness of 115 nm isused.

[0064] Then, a tantalum nitride film having a thickness of 30 nm isformed as a first conductive film 309. Further, a tungsten film having athickness of 370 nm is formed as a second conductive film 310. Thesemetal films may be formed by a sputtering method. Further, by adding aninert gas such as Xe, Ne or the like as a sputtering gas, it becomespossible to prevent the film peeling-off derived from a stress. Further,by setting the purity of a tungsten target to 99.9999%, the tungstenfilm having a low resistance with a resistivity of 20 mΩcm or less canbe formed.

[0065] Subsequently, resist masks 311 a-311 g are formed and the firstconductive film 309 and the second conductive film 310 are etched. Inthis specification, the etching treatment performed at this stage ofoperation is called a first etching treatment.

[0066] This embodiment adopts an etching method which uses ICP(Inductively Coupled Plasma). As an etching gas, a mixture gas of atetrafluoro carbon (CF₄) gas and a chlorine (Cl₂) gas is used and thefilm forming pressure is set to 1 Pa. Under this state, an RF power(13.56 MHz) of 500 W is applied to a coil-type electrode to generateplasma. Further, an RF power (13.56 MHz) of 150 W is applied as aself-bias voltage to a stage on which the substrate is mounted so as toapply a negative self bias voltage to the substrate.

[0067] By performing the etching treatment under such conditions, theselection ratio of the tantalum nitride film and the tungsten filmbecomes close to 1:1 and hence, they can be etched unitarily. Further,it may be possible to form them in a tapered shape having a taper angleof 15-45° by making use of the retardation of the resist masks 311 a-311e. Under the etching conditions of this embodiment, a taper angle ofapproximately 25° can be obtained.

[0068] In this manner, gate electrodes 312-316 and a source wiring 317and a drain wiring 318 of the switching TFT which are respectively madeof a laminated film constituted of a first conductive film and a secondconductive film are formed. The drain wiring 318 also works as a gateelectrode of a current control TFT.

[0069] Then, the semiconductor films 304-307 are doped with an n-typeimpurity element (phosphor in this embodiment) in a self-aligning mannerusing the gate electrodes 312-316, the source wiring 317 and the drainwiring 318 as masks. Impurity regions 319-327 formed in this mannerinclude the n-type impurity element at the concentration of1×10²⁰-1×10²¹ atoms/cm³(typically 2×10²⁰-5×10²¹ atoms/cm³). Theseimpurity regions 319-327 form a source region and a drain region of then-channel type TFT.

[0070] Subsequently, the etching of the gate electrodes is performed bydirectly using the resist masks 311 a-311 g. The etching conditions atthis time may be equal to the etching condition of the first etchingtreatment. Here, the tapered portions of the gate electrodes areretracted to form gate electrodes 328-332, a source wiring 333 and adrain wiring 334 which have a line width narrower (smaller contour) thanthe line width shown in FIG. 2(C).

[0071] Further, as shown in FIG. 2(E), the second conductive film(tungsten film) is selectively etched by directly using the resist masks311 a-311 g. Here, the etching conditions may mix an oxygen gas as theetching gas compared to the first etching treatment. In thisspecification, the etching treatment performed here is called a secondetching treatment. Here, by using the oxygen as an etching gas inaddition, the progress of the etching of the first conductive film(tantalum nitride film) can be made extremely slow.

[0072] Here, gate electrodes 335-339 which have a laminated structuremade of the first gate electrodes 335 a-339 a and the second gateelectrodes 335 b-339 b can be formed. Further, a source wiring 340 whichhas a laminated structure made of a first source wiring 340 a and asecond source wiring 340 b and a drain wiring 341 which has a laminatedstructure made of a first drain wiring 341 a and a second drain wiring341 b can be formed.

[0073] Subsequently, the resist masks 311 a-311 g are removed. Then, asshown in FIG. 3(A), the semiconductor films 304-307 are doped with ann-type impurity element (phosphor in this embodiment). In this step, theadjustment is performed such that the n-type impurity element is dopedinto n-type impurity regions 342-351 at the concentration of2×10¹⁶-5×10¹⁹ atoms/cm³(typically 5×10¹⁷-5×10¹⁸ atoms/cm³). In thisspecification, the impurity regions which are doped with the n-typeimpurity element at this concentration are called n-type impurityregions (b).

[0074] Further, n-type impurity regions 352-361 are also formedsimultaneously. Since these impurity regions are formed by the n-typeimpurity element which penetrates the first gate electrodes 335 a-339 a,phosphorus is doped to the n-type impurity regions 352-361 at theconcentration of {fraction (1/2)}-{fraction (1/10)} (typically ⅓-¼) ofthe n-type impurity regions 342-351. To be more specific, the n-typeimpurity regions 342-351 includes the n-type impurity element at theconcentration of 1×10¹⁶-5×10¹⁸ atoms/cm³(typically 3×10¹⁷-3×10¹⁸atoms/cm³). In this specification, the impurity regions which are dopedwith the n-type impurity element at this concentration are called n-typeimpurity regions (c).

[0075] Further, since it is necessary to dope the n-type impurityelement by making the n-type impurity element penetrate the first gateelectrodes 335 a-339 a and the gate insulation film 308, theacceleration voltage is set to a relatively high value such as 70-120 kV(90 kV in this embodiment).

[0076] Subsequently, as shown in FIG. 3(B), a resist mask 362 is formed.Then, a p-type impurity element (boron in this embodiment) is doped toform impurity regions 363, 364 which contain boron at highconcentration. Here, boron is doped by an ion doping method which usesdiborane (B₂H₆) such that the concentration of the boron becomes3×10²⁰-3×10²¹ atoms/cm³(typically 5×10²⁰-1×10²¹ atoms/cm³). Theacceleration voltage may be 20-30 kV. In this specification, theimpurity regions which are doped with the p-type impurity element atthis concentration are called p-type impurity regions (a).

[0077] Here, although the p-type impurity regions (a) 363, 364 includeregion which are already doped with phosphorus at the concentration of1×10²⁰-1×10²¹ atoms/cm³, the boron doped at this stage of operation isdoped at the concentration at least three times greater than theconcentration of phosphorus. Accordingly, the preformed n-type impurityregions are completely inverted to the p-type and function as the p-typeimpurity regions.

[0078] Subsequently, after removing the resist mask 362, a protectivefilm (not shown in the drawing) made of a silicon nitride film or asilicon nitride-oxide film is formed. Then, the n-type impurity elementor the p-type impurity element which are doped at respectiveconcentration is activated. As activation means, a furnace annealingmethod is used. In this embodiment, a heat treatment is performed in anelectric heating furnace at a temperature of 550° C. for four hours inthe nitrogen atmosphere. Here, it is preferable to restrict the oxygenconcentration in the nitrogen atmosphere as low as possible to preventthe oxidization of the gate electrodes. The oxygen concentration maypreferably be set to not more than 1 ppm.

[0079] Here, in the regions doped with the n-type impurity element, thatis, in the n-type impurity regions and the p-type impurity regionsincluding the n-type impurity element, nickel used for crystallizationof the amorphous silicon film moves in an arrow direction to performgettering. That is, the nickel concentration in the channel formingregions 365-369 of the TFT is largely reduced and becomes at least notmore than 1×10¹⁶ atoms/cm³ (however, this value being the lower limit ofmeasurement of mass secondary ion spectrometry).

[0080] Further, as shown in FIG. 3(D), a protective film 370 made ofsilicon nitride film or a silicon nitride-oxide film is formed.Thereafter, a heat treatment is performed at a temperature range of300-450° C. in the nitrogen atmosphere so as to perform thehydrogenation treatment. This step is a step in which unpaired bondinghands (dangling bonds) of the semiconductor are subject to hydrogentermination by hydrogen which is thermally excited. In this treatment,hydrogen contained in the protective film 370 is diffused so as toperform the hydrogenation treatment. As other method, a known plasmahydrogenation treatment may be performed.

[0081] Further, it may be possible to perform a heat treatment at atemperature of 300-450° C. for 1-12 hours in the atmosphere containinghydrogen of 3-100% to perform the hydrogenation treatment.

[0082] After completion of the hydrogenation treatment, a resin filmhaving a thickness of 1-2 μm is formed as an interlayer insulation film371. As resin material, polyimide, polyamide, acrylic resin or BCB(benzocyclobutene) may be used. Further, photosensitive resin may bealso used.

[0083] Subsequently, as shown in FIG. 4(A), contact holes are formed inthe interlayer insulation film 371 and wirings 373-378 and a pixelelectrode 379 are formed. In this embodiment, each wiring is made of alaminated film having a three layer structure which is constituted bycontinuously forming a titanium film of 50 nm, an aluminum film of 200nm containing titanium and an aluminum film of 200 nm containing lithiumfrom the lower layer side by sputtering method.

[0084] Here, it is important to form a topmost surface of the pixelelectrode 379 into a metal surface which has the small work function.This is because that the pixel electrode 379 directly functions as acathode of an EL element. Accordingly, it is preferable that at leastthe topmost surface of the pixel electrode 379 is made of a metal filmcontaining an element which belongs to a group 1 or a group 2 of theperiodic table or a bismuth (Bi) film. Further, since the wirings373-378 are formed simultaneous with the pixel electrode 379, they areformed of the same conductive film.

[0085] Here, the wirings 373, 375 function as source wirings of a CMOScircuit and the wiring 374 functions as a drain wiring. Further, thewiring 376 functions as a wiring which electrically connects the sourcewiring 340 and a source region of a switching TFT while the wiring 377functions as a wiring which electrically connects the drain wiring 341and a drain region of the switching TFT. Further, the wiring 378 is asource wiring (corresponding to a power supply line) of a currentcontrol TFT and numeral 379 indicates the pixel electrode of the currentcontrol TFT.

[0086] Subsequently, as shown in FIG. 4(B), a bank 380 is formed. Thebank 380 may be formed by patterning an insulation film or an organicresin film of 100-400 nm containing silicon. This bank 380 is formedsuch that the bank 380 fills in a gap defined between pixels (betweenpixel electrodes). Further, the bank 380 is provided also for thepurpose of preventing organic EL material such as a light emitting layerwhich will be formed next from directly coming into contact with an endportion of the pixel electrode 379. In other words, the bank 380 may becalled an insulation film having opening portions on a flat surface ofthe pixel electrode 379.

[0087] Since the bank 380 is an insulation film, it is necessary to payattention to the electrostatic breakdown of the element at the time offorming the film. In this embodiment, the resistivity is decreased bydoping carbon particles and pigment in the insulation film whichconstitutes the bank 380 so as to suppress the generation of staticelectricity. Here, a doping quantity of the carbon particles and pigmentmay be adjusted so as to make the resistivity to 1×10⁶-1×10¹² Ωm(preferably 1×10⁸-1×10¹⁰ Ωm).

[0088] Here, a pretreatment is performed on the surface of the pixelelectrode 379. In this embodiment, the whole substrate is heated at atemperature of 100-120° C. and the plasma treatment is performed usingargon, neon or helium. Due to this step, oxygen and water adhered to thesurface of the pixel electrode 379 are removed and simultaneously anatural oxide film which is formed on the surface of the electrode isalso removed.

[0089] Subsequently, an EL layer 381 is formed. In this embodiment, alaminated body made of a hole injection layer and a light emitting layeris called the EL layer. That is, a laminated body which is constitutedby combining the hole injection layer, a hole transport layer, a holeinterruption layer, an electron transport layer, an electron injectionlayer or an electron interruption layer with the light emitting layer isdefined as the EL layer. Here, the EL layer 381 may be made of eitherorganic material or inorganic material and further may be made of eitherhigh molecular material or low molecular material.

[0090] In this embodiment, as the electron injection layer, a filmhaving a thickness of 5-10 nm is formed of lithium fluoride and, as thelight emitting layer which emits white light, a polyvinyl carbazole(PVK) film having a thickness of 80 nm is formed. Lithium acetyl acetateis formed by a vapor deposition and polyvinyl carbazole is coated bydissolving it in 1,2-dichloro-methane. Further, the light emitting layeris subjected to the heat treatment within a temperature range (typically80-120° C.) which does not collapse the EL layer after being coated andhence, a solvent is evaporated to produce a thin film.

[0091] For example, the light emitting layer which is obtained bydissolving PVK, Bu-PBD (2-(4′-tert-butylphenyl)-5-(4″biphenyl)-1,3,4-(oxadiazole), cumarin 6, DCM1(4-dicyanomethylene-2-methyl-6-p-dimethylamino styryl -4H-pyran), TPB(tetraphenyl butadiene) and Nile red in the 1,2-dichloro-methane may beused.

[0092] Further, as high-molecular material which can be used as thelight emitting layer which emits white light, besides theabove-mentioned material, materials described in Japanese PatentLaid-open No. 96959/1996 or Japanese Patent Laid-open No. 63770/1997 canbe used.

[0093] Further, a copper phthalocyanine (CuPc) film having a thicknessof 20 nm is formed on the light emitting layer as the hole injectionlayer. Polythiophene (PEDOT) may be used in place of copperphthalocyanine.

[0094] After forming the EL layer 381 in this manner, an anode 382 madeof an oxide conductive film which has a large work function and istransparent to a visible light is formed with a thickness of 300 nm. Inthis embodiment, an oxide conductive film formed by doping gallium oxideinto zinc oxide is used. Besides such an oxide conductive layer, anoxide conductive film made of indium oxide, zinc oxide, tin oxide or acompound of these materials can be used. In this manner, the EL element383 which includes the pixel electrode (cathode) 379, the EL layer 381and the anode 382 is formed.

[0095] It is effective to form a passivation film 384 such that thepassivation film 384 covers the EL element 383 after forming the anode382. The passivation film 384 may be made of an insulation filmincluding a carbon film, a silicon nitride film or a siliconnitride-oxide film and is used in a form that the insulation film isused in a single layer or in a combined laminated layer.

[0096] Here, it is preferable to use a film exhibiting a favorablecoverage as the passivation film and it is effective to use a carbonfilm, particularly a DLC (diamond-like carbon) film. The DLC film can beformed within a temperature range from a room temperature to less than100° C. and hence, the DLC film can be easily formed above the EL layer381 having low heat resistance. Further, the DLC film exhibits a highblocking effect against oxygen and hence, the oxidation of the EL layer381 can be prevented. Accordingly, it becomes possible to overcome aproblem that the EL layer 381 is oxidized during a period in which anensuing sealing step is performed.

[0097] Further, a sealing member 385 is formed on the passivation film384 and a cover member 386 is laminated over the passivation film 384.As the sealing material 385, ultraviolet curing resin may preferably beused and it is effective to provide material having a moistureabsorption effect or material having an oxidation prevention effect inthe inside of the sealing material 385. Further, as the cover member386, a glass substrate, a metal substrate, a ceramic substrate or aplastic substrate (including plastic film) can be used. It is effectiveto preliminarily provide a carbon film, particularly a DLC film on bothsurfaces or one surface of the cover member 386. When the plastic filmis used as the cover member, the DLC film may be formed on both sides ofthe cover member 386 using a roll-to-roll method.

[0098] Further, coloring layers 387 a, 387 b are formed on the covermember 386. The coloring layer 387 a is a coloring layer which allowswavelengths having the peak in the vicinity of 650 nm to passtherethrough (hereinafter called “red coloring layer”) and the coloringlayer 387 b is a coloring layer which allows wavelengths having the peakin the vicinity of 450 nm to pass therethrough (hereinafter called “bluecoloring layer”).

[0099] It is preferable to use a coloring layer of the EL light emittingdevice which exhibits the low pigment content to ensure a large quantityof light. Further, a quantity of light can be increased by making thefilm thickness of the coloring layer thin. Still further, it isunnecessary for the coloring layer to have a sharp peak wavelength as inthe case of a coloring layer used in a liquid crystal display device. Itis rather preferable to use a coloring layer having broad peakwavelengths.

[0100] Further, by making the coloring layers 387 a, 387 b contain 1-10%of black pigment, the external light entering from the outside of the ELlight emitting device can be absorbed so that a drawback that a vieweris reflected on a cathode (pixel electrode 379) can be suppressed.

[0101] Further, in this embodiment, the coloring layers 387 a, 387 b areformed such that they are superposed on the source wiring 340. Since aquantity of light which passes a superposed portion 388 is drasticallydecreased, superposed portion 388 functions as a light shieldingportion. With the provision of the light shielding portion 388 over thesource wiring 340, it becomes possible to prevent the color mixingbetween neighboring pixels.

[0102] In this manner, the EL light emitting device having the structureshown in FIG. 4(B) is completed. It is effective to continuously performthe processing up to the step for forming the passivation film 384 afterforming the bank 380 using a film forming device of a multi-chambersystem (or an in-line system) without releasing the processing in theatmosphere. However, when the EL layer is formed by a spin coatingmethod, it is preferable to perform the processing in the nitrogenatmosphere or the rare gas atmosphere which is subjected to thedeoxidizing treatment. Further, by developing the above concept, it maybe possible to continuously perform the processing up to the step forlaminating the covering material 386 without releasing the processing inthe atmosphere.

[0103] Here, each TFT is explained. A drive circuit is formed by using aCMOS circuit which complementarily combines a p-channel type TFT 401 andan n-channel type TFT 402 as a basic unit. Here, the drive circuitincludes a shift register, a buffer, a level shifter, a latch, asampling circuit (including a transfer gate) or a D/A converter or thelike.

[0104] The active layer of the p-channel type TFT 401 includes a sourceregion 411, a drain region 412 and a channel forming region 413. Here,the source region 411 and the drain region 412 are superposed on thefirst gate electrode 335 a while sandwiching the gate insulation film308 between the source region 411 and the drain region 412 and the firstgate electrode 335 a.

[0105] Further, the active layer of the n-channel type TFT 402 includesa source region 414, a drain region 415, n-type impurity regions (b)416, 417, n-type impurity regions (c) 418, 419 and a channel formingregion 420. Here, n-type impurity regions (b) 416, 417 are formed suchthat they are not superposed on the first gate electrode 336 a in a formthat they sandwich the gate insulation film 308 together with the firstgate electrode 336 a. On the other hand, the n-type impurity regions (c)418, 419 are formed such that they are superposed on the first gateelectrode 336 a while sandwiching the gate insulation film 308 togetherwith the first gate electrode 336 a. Here, the n-type impurity regions(c) 418, 419 which are formed such that they are superposed on the firstgate electrode 336 a have an effect that the injection of hot carriercan be suppressed and hence, the deterioration phenomenon derived fromthe injection of hot carrier can be effectively suppressed.

[0106] Further, a switching TFT 403 and a current control TFT 404 areformed in the pixel portion. The drain of the switching TFT 403 iselectrically connected to the gate of the current control TFT 404 andthe switching operation of the current control TFT 404 is controlledthrough the switching TFT 403. Then, a current quantity which flows intothe EL element is controlled by the current control TFT 404.

[0107] An active layer of the switching TFT 403 includes a source region421, a drain region 422, n-type impurity regions (b) 423-426, n-typeimpurity regions (c) 427-430, a separation region 431, channel formingregions 432, 433. Further, the source region 421 is connected to thesource wiring 340 through the wiring 379. Still further, the drainregion 422 is connected to the drain wiring 341 through the wiring 380.This drain wiring 341 is connected to the gate electrode 339 of thecurrent control TFT 404.

[0108] The structure of the switching TFT 403 is substantially equal tothat of the n-channel type TFT 402. Here, the n-type impurity regions(b) 423-426 are formed such that they are not superposed on the firstgate electrode 337 a, 338 a in a form that they sandwich the gateinsulation film 308 together with the first gate electrodes 337 a, 338a. On the other hand, the n-type impurity regions (c) 427-430 are formedsuch that they are superposed on the first gate electrodes 337 a, 338 awhile sandwiching the gate insulation film 308 together with the firstgate electrodes 337 a, 338 a. That is, the switching TFT 403 has thestructure which can strongly resist the hot carrier deterioration.

[0109] Although an example which uses the n-channel type TFT as theswitching TFT 403 is exemplified in this embodiment, a p-channel typeTFT may be used.

[0110] Further, the active layer of the current control TFT 404 includesa source region 434, a drain region 435, n-type impurity regions (b)436, 437, n-type impurity regions (c) 438, 439 and a channel formingregion 440. The structure of the current control TFT 404 issubstantially equal to that of the n-channel type TFT 402 and theexplanation thereof may be referred to the explanation of the n-channeltype TFT 402. Although an example which uses the n-channel type TFT asthe current control TFT 404 is exemplified in this embodiment, ap-channel type TFT may be used.

[0111] Here, a view of the pixel portion as seen from an upper surfaceis shown in FIG. 5. FIG. 6(A) is a cross-sectional view taken along aline A-A′ in FIG. 5, FIG. 6(B) is a cross-sectional view taken along aline B-B′ in FIG. 5 and FIG. 6(C) is a cross-sectional view taken alonga line C-C′ in FIG. 5. FIG. 6(A) shows the cross-sectional structure ofthe switching TFT 403, FIG. 6(B) shows the cross-sectional structure ofthe holding capacity, and FIG. 6(C) shows the cross-sectional structureof the current control TFT 404. The pixel portion shown in thesedrawings can be formed by the fabrication steps shown in FIG. 2 to FIG.4 and symbols which are used in FIG. 2 to FIG. 4 are referred whennecessary.

[0112] First of all, the switching TFT 403 is explained using FIG. 5 andFIG. 6(A). In FIG. 5 and FIG. 6(A), numeral 501 indicates an activelayer. Since the detail of the active layer 501 has the constitutionwhich has been explained in conjunction with FIG. 4(B), the explanationthereof is omitted here. The source wiring 340 is electrically connectedto the active layer 501 through the wiring 376 and is also electricallyconnected to the drain wiring 341 through the wiring 377.

[0113] Further, a gate electrode 502 is formed on the active layer 501.With respect to the gate electrode 502, portions which are overlappedwith the active layer 501 correspond to the gate electrodes 337, 338 inFIG. 2(E). Further, the gate electrode 502 is electrically connected toa gate wiring 504 at a contact portion 503.

[0114] Subsequently, the current control TFT 404 is explained inconjunction with FIG. 5 and FIG. 6(B). In FIG. 5 and FIG. 6, numeral 505indicates an active layer. Since the detail of the active layer 505 hasthe constitution which has been explained in conjunction with FIG. 4(B),the explanation thereof is omitted here. The source region of the activelayer 505 is electrically connected to the wiring (power supply line)378 and the drain region is electrically connected to the pixelelectrode (cathode of the EL element) 379.

[0115] Further, the gate electrode 339 is formed on the active layer505. The gate electrode 339 corresponds to a portion where the drainwiring 341 is superposed on the active layer 505. Further, the drainwiring 341 is directly extended and functions also as an upper electrode506 of the holding capacity shown in FIG. 6(C). The wiring (power supplyline) 378 is electrically connected to a semiconductor film 508 at acontact portion 507 and this semiconductor film 508 functions as a lowerelectrode of the holding capacity.

[0116] Further, FIG. 7 shows an example of a circuit constitution of theEL light emitting device of this embodiment. In this embodiment, thecircuit constitution which performs a digital drive is shown. In thisembodiment, the circuit includes a source-side drive circuit 901, apixel portion 908 and a gate-side drive circuit 909. In thespecification, a drive circuit portion is a general term which includesthe source-side drive circuit and a gate-side drive circuit.

[0117] In this embodiment, an n-channel type TFT having the structureshown in FIG. 4(B) is formed on the pixel portion 908 as a switching TFTand this switching TFT is arranged at a cross point where the gatewiring connected to the gate-side drive circuit 909 and the sourcewiring connected to the source-side drive circuit 901 cross each other.Further, the drain of the switching TFT is electrically connected to thegate of the p-channel type current control TFT.

[0118] The source-side drive circuit 901 includes a shift register 902,a buffer 903, a latch (A) 904, a buffer 905, a latch (B) 906 and abuffer 907. In case of an analog drive, a sampling circuit (transfergate) may be used in place of the latches (A), (B). Further, thegate-side drive circuit 909 includes a shift register 910 and a buffer911.

[0119] Although not shown in the drawing, a gate-side drive circuit maybe further provided at a side opposite to the gate-side drive circuit909 while sandwiching the pixel portion 908 therebetween. In this case,both gate-side drive circuits have the same structure and share thecommon gate wiring so that when one gate-side drive circuit is brokendown, the remaining gate-side drive circuit transmits gate signals so asto ensure the normal operation of the pixel portion.

[0120] The above-mentioned constitution can be easily realized byfabricating the TFTs in accordance with the fabrication steps shown inFIG. 2 to FIG. 4. Further, although only the constitutions of the pixelportion and the drive circuit portion are exemplified in thisembodiment, other circuits and components such as a signal divisioncircuit, a D/A converter, an operational amplifier, a logic circuit suchas a γ correction circuit can be formed on the same substrate inaccordance with the fabrication steps of this embodiment. Further, it isconsidered that a memory, a microcomputer or the like can be also formedon the same substrate.

[0121] Further, the EL light emitting device of this embodiment in thestate that the fabrication processing up to the sealing (or filling)step for protecting the EL element has been completed is explainedhereinafter in conjunction with FIG. 8(A) and FIG. 8(B). Here, symbolsused in FIG. 7 are used when necessary.

[0122]FIG. 8(A) is an upper plan view showing the state that thefabrication processing up to the sealing (or filling) step forprotecting the EL element has been completed. Numeral 901 indicates thesource-side drive circuit, numeral 908 indicates the pixel portion andnumeral 909 indicates the gate-side drive circuit. In the drawing, thesecircuits and portion are described by a dotted line. Further, numeral1001 indicates a cover member, numeral 1002 indicates a first sealmember, and numeral 1003 indicates a second seal member. A sealingmaterial (not shown in the drawing) is provided between the inner covermember 1001 surrounded by the first seal member 1002 and the substrateon which the EL element is formed.

[0123] Numeral 1004 indicates a connection wiring provided fortransmitting signals to be inputted to the source-side drive circuit 901and the gate-side drive circuit 909. The connection wiring 1004 receivesvideo signals and clock signals from a FPC 1005 which constitutes anoutside input terminal.

[0124] Here, FIG. 8(B) is a cross-sectional view taken along a line A-A′of FIG. 8(A). In FIG. 8(A) and FIG. 8(B), identical parts are indicatedby same symbols.

[0125] As shown in FIG. 8(B), the pixel portion 908 and the gate-sidedrive circuit 909 are formed on a glass substrate 1006 and the pixelportion 908 is constituted of the current control TFT 404 and aplurality of pixels including pixel electrodes 379 which areelectrically connected to the drain of the current control TFT 404.Further, the gate-side drive electrode 909 is formed of the CMOS circuitwhich complementarily combines the p-channel type TFT 401 and then-channel type TFT 402.

[0126] The pixel electrodes 379 function as the cathodes of the ELelements. Further, the banks 380 are formed at both sides of the pixelelectrode 379 and the EL layer 381 and the anode 382 of the EL elementare formed on the pixel electrode 379. The anode 382 also functions asthe wiring common to all pixels and is electrically connected to the FPC1005 through the connection wiring 1004. Further, elements which areincluded in the pixel portion 908 and the gate-side drive circuit 909are all covered with the anode 382 and the passivation film 384.

[0127] Further, the cover member 1001 is laminated to the sealingmaterial 1007 by the first seal member 1002. A red color coloring layer387 a, a blue color coloring layer 387 b and a green color coloringlayer (coloring layer which allows wavelengths having the peak in thevicinity of 550 nm to pass therethrough) 387 c are formed on the covermember 1001. They are superposed with each other above the source wiring378 thus forming the light shielding portions 388 above the sourcewiring 378.

[0128] Here, a spacer made of a resin film may be provided for ensuringa gap between the cover member 1001 and the EL element. Then, thesealing material 1007 is filled in the inside of the first seal member1002. It is preferable to use light curing resin as the first sealmember 1002 and the sealing material 1007. Further, it is preferablethat the first seal member 1002 is made of a material which prevents thepenetration of moisture and oxygen as much as possible. Further, thesealing material 1007 may contain material which has a moistureabsorption effect or material which prevents oxidation in the insidethereof.

[0129] The sealing material 1007 which is formed such that the sealingmaterial 1007 covers the EL element also functions as an adhesive agentto adhere the cover member 1001. As the sealing material 1007,polyimide, acrylic resin, PVC (polyvinyl chloride), epoxy resin,silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate)can be used.

[0130] Further, in this embodiment, as the cover member 1001, a glassplate, a quartz plate, a plastic plate, a ceramic plate, FRP (FiberglassReinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylarfilm, a polyester film or an acrylic film can be used.

[0131] Still further, according to this embodiment, carbon films (to bemore specific, DCL films) 1008 a, 1008 b having a thickness of 2-30 nmare formed on both surfaces of the cover member 1001. Such carbon filmsplay a role to prevent the intrusion of oxygen and water and tomechanically protect the surfaces of the cover member 1001. It isneedless to say that a polarization plate (typically circularpolarization plate) may be laminated to the outside carbon film 1008 a.

[0132] Further, after adhering the cover member 1001 using the sealingmaterial 1007, the second seal member 1003 is formed such that thesecond seal member 1003 covers a side face (exposed surface) of thesealing material 1007. The second seal member 1003 may be made of thesame material as the first seal member 1002.

[0133] By sealing the EL element in the sealing material 1007 with theabove-mentioned structure, it becomes possible to completely shield theEL element from the outside so that the intrusion of the substances suchas moisture, oxygen or the like which accelerates the deterioration dueto the oxidation of the EL layer from the outside can be prevented.Accordingly, the EL light emitting device having high reliability can befabricated.

[0134] Embodiment 2

[0135] This embodiment explains an example of the arrangement ofcoloring layers in conjunction with FIG. 10. FIG. 10 is a view of thepixel portion as seen from an upper surface. Each pixel has thestructure which has been explained in conjunction with FIG. 5, FIG. 6(A)to FIG. 6(C).

[0136] In FIG. 10, numeral 1103 indicates a red coloring layer, numeral1101 indicates a green coloring layer, numeral 1102 indicates a bluecoloring layer. Further, numeral 1104 indicates a pixel which emitsgreen light, numeral 1105 indicates a pixel which emits blue light andnumeral 1106 indicates a pixel which emits red light. In thisembodiment, the red coloring layer 1103 is formed on the pixel 1106which emits red light, the blue coloring layer 1102 is formed on thepixel 1105 which emits blue light, and the green coloring layer 1101 isformed on the pixel which emits green light.

[0137] Further, the red coloring layer 1103, the green coloring layer1101 and the blue coloring layer 1102 are superposed with each otherabove each source wiring 1107 and current supply line 1108 thus forminglight shielding portions 1109 a-1109 d and 1110. In this manner, eachpixel is surrounded by the light shielding portions 1109 a-1109 d andthe 1110 and hence, among light generated and emitted at each pixel,light which reaches the light shielding portions 1109 a-1109 d and the1110 is absorbed therein. That is, the color mixing between theneighboring pixels can be effectively suppressed.

[0138] It is effective to make each coloring layer contain black pigmentor carbon particles. Due to such a provision, light from outside isabsorbed and hence, a drawback that a viewer who observes an image isreflected on the cathode made of a metal film can be reduced. However,when the addition amount of the black pigment or carbon particlesbecomes excessively large, a quantity of emitting light becomes small.Accordingly, it is preferable to set an addition amount of the blackpigment or carbon particles to 1-10%.

[0139] This embodiment can be carried out in combination with theembodiment 1.

[0140] Embodiment 3

[0141] In the embodiment 1, an example was presented in which an ELmaterial, from which white light emission can be obtained, was used asthe light emitting layer included in an EL layer. The white light beingemitted was then provided to pass through the red colored layer, thegreen colored layer, and the blue colored layer to obtain red light,green light, and blue light, respectively.

[0142] In this embodiment, light emitting layers which can obtain redlight emission, green light emission, and blue light emission are formedas pixels for developing red, green, and blue, respectively. The redlight, the green light, and the blue light emitted from the respectivelight emitting layers are made to pass through the red colored layer,the green colored layer, and the blue colored layer, respectively, toimprove purity of each color.

[0143] In this embodiment, it is necessary to deposit three kinds of ELmaterials respectively providing emissions of red, green and blue. Forthis purpose, however, known materials can be used. In addition, it isalso necessary to carry out the deposition separately for each kind ofthe pixel. This can be carried out by depositing a low-molecular groupEL material with a vapor deposition method using shadow masks, or bydepositing a high-molecular group EL material with an ink jet method ora printing method.

[0144] The constitution according to this embodiment can be implementedin being freely combined with that according to the embodiment 1 orembodiment 2. Moreover, as shown in the embodiment 2, it is effective tomake each of the colored layers contain a black pigment or carbonparticles.

[0145] Embodiment 4

[0146] In this embodiment, an example was presented in which an ELmaterial, from which blue light emission or bluish green light emissioncan be obtained, was used as the light emitting layer. The emitted lightwas then made pass through a color conversion layer for obtaining redlight, green light, or blue light.

[0147] In this embodiment, for a pixel developing red color, there isformed a conversion layer for converting blue light to red light, andfor a pixel developing green color, a conversion layer for convertingblue light to green light. The color conversion layers can be providedby using known ones. The blue light emitted from the light emittinglayer excites the color conversion layer to emit red light or greenlight.

[0148] Furthermore, the red light and the green light emitted from therespective color conversion layers, and the blue color emitted from thelight emitting layer are made to pass through the red colored layer, thegreen colored layer, and the blue colored layer, respectively, toimprove purity of each color.

[0149] In this embodiment, it is necessary only to deposit the lightemitting layer by which emission of blue or bluish green light isobtained. Therefore, it is preferable to deposit the light emittinglayer by a simple technique such as a spin coat method or a printingmethod. Of course, the light emitting layer can be deposited by thevapor deposition method.

[0150] Note that the constitution according to this embodiment can beimplemented in being freely combined with that according to theembodiment 1 or embodiment 2. Moreover, as shown in the embodiment 2, itis effective to make each of the colored layers contain a black pigmentor carbon particles.

[0151] Embodiment 5

[0152] This embodiment describes an EL light emitting device havingpixel portions which differ in structure from those of the EL lightemitting device of the embodiment 1. The EL light emitting device ofthis embodiment substantially has the same TFT structure and EL elementstructure as those of the first embodiment 1 except for a point thatlayers on which various wiring (gate wiring, source wiring, drain wiringor current supply line or the like) are formed. Accordingly, parts whichare identical with those of the embodiment 1 are quoted by the symbolswhich are used in FIG. 5 and FIG. 6(A) to FIG. 6(C).

[0153] Here, FIG. 11 is a view showing a pixel portion as seen from anupper surface. FIG. 12(A) is a cross-sectional view taken along a lineA-A′ in FIG. 11, FIG. 12(B) is a cross-sectional view taken along a lineB-B′ in FIG. 11 and FIG. 12(C) is a cross-sectional view taken along aline C-C′ in FIG. 11. FIG. 12(A) shows the cross-sectional structure ofa switching TFT, FIG. 12(B) shows the cross-sectional structure of theholding capacity, and FIG. 12(C) shows the cross-sectional structure ofa current control TFT. The pixel portion shown in these drawings can beformed by referring to the fabrication steps shown in FIG. 2 to FIG. 4.

[0154] First of all, the switching TFT is explained in conjunction withFIG. 11 and FIG. 12(A). In FIG. 11 and FIG. 12(A), numeral 1201indicates an active layer. Since the detail of the active layer 1201 isas same as that of the switching TFT explained in FIG. 4(B), theexplanation thereof is omitted here. A gate wiring 1202 is superposed onthe active layer 1201 and functions as the gate electrode. Then, asource wiring 1203 and a drain wiring 1204 are connected to the activelayer 1201 and the drain wiring 1204 is connected to a gate wiring 1205of the current control TFT.

[0155] Subsequently, the current control TFT is explained in conjunctionwith FIG. 11 and FIG. 12(B). Although the current control TFT has thestructure in which two TFTs are connected in parallel, the explanationhere is made with respect to one of them. In FIG. 11 and FIG. 12(B),numeral 1206 indicates an active layer. Since the detail of the activelayer 1206 is as same as that of the current control TFT explained inFIG. 4(B), the explanation thereof is omitted here. A source region ofthe active layer 1206 is connected to a current supply line 1207 and adrain region is connected to a pixel electrode (cathode of EL element)1208.

[0156] Further, the gate wiring 1205 of the current control TFT alsoworks as an upper electrode 1210 of a holding capacity 1209 shown inFIG. 12(C) disposed right below the current supply line 1207. Here, thecurrent supply line 1207 is electrically connected to a semiconductorfilm 1211 and this semiconductor film 1211 functions as the lowerelectrode of the holding capacity 1209. With the provision of thestructure of this embodiment, since the holding capacity 1209 iscompletely concealed under the current supply line 1207, there is nopossibility that the effective light emitting area of the pixel isnarrowed.

[0157] Subsequently, a canceling TFT is explained. The pixel of thisembodiment is provided with the canceling TFT 1212 having the samestructure as the switching TFT. In an active layer 1213 of the cancelingTFT 1212, a source region is connected to a current supply line 1207 anda drain region is electrically connected to a gate wiring 1205 of thecurrent control TFT through a drain wiring 1214. Here, since thestructure of the active layer 1213 is substantially equal to that of theswitching TFT, the explanation thereof is omitted here.

[0158] Further, a gate wiring of the canceling TFT (called “cancelinggate wiring” hereinafter) 1215 is arranged parallel to the gate wiring1202 of the switching TFT.

[0159] When the canceling gate wiring 1215 receives a signal which makesthe canceling TFT 1212 the “ON” state, the gate wiring 1205 of thecurrent control TFT is forced to take the equal potential as that of thecurrent supply line 1207. That is, since the current control TFT becomesthe “OFF” state, the supply of electricity to the EL element 383 is cutand hence, the light emitting is stopped and the lighting by the pixelis turned off.

[0160] In this manner, by forcibly turning off the lighting of the pixelwith the provision of the canceling TFT 1212, the controllability of thelighting time of the pixel can be enhanced. That is, the gradation inthe image display of the time gradation system can be easily increased.With respect to the EL light emitting device which adopts such acanceling TFT, Japanese Patent Laid-open No.338786/1999 may be referred.

[0161] Further, the constitution of this embodiment can be carried outin free combination with any one of the embodiments 2 to 4.

[0162] Embodiment 6

[0163] In this embodiment, an example of manufacturing an EL lightemitting device by manufacturing steps different from that for theembodiment 1 will be explained with reference to FIG. 13. Since thisembodiment only differs from the embodiment 1 in the intermediatemanufacturing steps, the reference numerals used in the description ofthe embodiment 1 will be referred if necessary.

[0164] First, according to the manufacturing steps in the embodiment 1,the EL light emitting device is manufactured up to the step shown inFIG. 2E. In this embodiment, however, the doping step of an n-typeimpurity element shown in FIG. 2C is omitted. Thus, the state shown inFIG. 13A is obtained.

[0165] Next, as shown in FIG. 13B, after the resist masks 311 a to 311 eare removed, the semiconductor film is doped with an n-type impurityelement (in this embodiment, phosphorus). Note that the doping step ofthe n-type impurity element can be carried out under the same conditionas that of the doping step shown in FIG. 3A in the embodiment 1.

[0166] In this way, there are formed n-type impurity regions (b) 601 to609 and n-type impurity regions (c) 610 to 619. Concentrations of then-type impurity element contained in the n-type impurity regions (b) 601to 609 and the n-type impurity regions (c) 610 to 619 are the same asthose in the embodiment 1.

[0167] Subsequent to this, resist masks 620 a to 620 e are formed and ann-type impurity element (in this embodiment, phosphorus) is added fordoping the semiconductor film like in the doping step shown in FIG. 2Cin the embodiment 1. In this way, there are formed n-type impurityregions (a) 621 to 629. Concentrations of the n-type impurity elementcontained in the n-type impurity regions (a) 621 to 629 are the same asthose in the embodiment 1 (FIG. 13C).

[0168] At this time, in each of the n-type impurity regions (b) 601 to609, a portion covered with corresponding one of the resist masks 620 ato 620 e functions as an LDD (light-doped drain) region later. Thelength of each n-type impurity region (b) (LDD length) that willfunction later as the LDD region can be freely adjusted by adjusting thelength of corresponding one of the resist masks 620 a to 620 e.Therefore, this embodiment is characterized in that it is excellent incontrollability of the LDD length.

[0169] Then, the resist masks 620 a to 620 e are removed and a resistmask 630 is newly formed. Then, a p-type impurity element (in thisembodiment, boron) is added similarly to the doping step in theembodiment 1 as shown in FIG. 3B. Thus, there are formed p-type impurityregions (a) 631 to 632. Concentrations of the p-type impurity elementcontained in the p-type impurity regions (a) 631 to 632 are the same asthose in the embodiment 1 (FIG. 13D).

[0170] Thereafter, an EL light emitting device may be manufacturedaccording to the steps subsequent to the activation step of theembodiment 1 shown in FIG. 3C. Moreover, the structure of the completedTFT is approximately the same as that of the embodiment 1, which can betherefore referred to the explanation of the completed TFT in thisembodiment. The constitution according to this embodiment can beimplemented in being freely combined with those according to any one ofthe embodiments 1 through 5.

[0171] Embodiment 7

[0172] In this embodiment, explanation will be made by using FIG. 14about an example of manufacturing an EL light emitting device bymanufacturing steps different from that for the embodiment 1. Since thisembodiment only differs from the embodiment 1 in the intermediatemanufacturing steps, the reference numerals used in the description ofthe embodiment 1 will be referred, if necessary.

[0173] First, according to the manufacturing steps in the embodiment 1,the EL light emitting device is manufactured up to the step shown inFIG. 2E. In this embodiment, however, the doping step of an n-typeimpurity element shown in FIG. 2C is omitted. Thus, the state shown inFIG. 14A is obtained.

[0174] Next, as shown in FIG. 14B, after the resist masks 311 a to 311 eare removed, an n-type impurity element (in this embodiment, phosphorus)is doped. The doping step of the n-type impurity element can be carriedout under the same condition as that of the doping step shown in FIG. 3Ain the embodiment 1.

[0175] In this way, there are formed n-type impurity regions (b) 601 to609 and n-type impurity regions (c) 610 to 619. Concentrations of then-type impurity element contained in the n-type impurity regions (b) 601to 609 and the n-type impurity regions (c) 610 to 619 are the same asthose in the embodiment 1.

[0176] Subsequent to this, with the gate electrodes 335 to 339 used asmasks, the semiconductor film is doped with an n-type impurity element(in this embodiment, phosphorus) like in the doping step shown in FIG.2C in the embodiment 1. In this way, there are formed n-type impurityregions (a) 701 to 709. Concentrations of the n-type impurity elementcontained in the n-type impurity regions (a) 701 to 709 are the same asthose in the embodiment 1 (FIG. 14C).

[0177] Following this, with a resist mask 710 formed, a p-type impurityelement (in this embodiment, boron) is added similarly to the dopingstep in the embodiment 1 as shown in FIG. 3B. Thus, there are formedp-type impurity regions (a) 711 to 714. Concentrations of the p-typeimpurity element contained in the p-type impurity regions (a) 711 to 714are the same as those in the embodiment 1 (FIG. 14D).

[0178] Thereafter, an EL light emitting device can be manufacturedaccording to the steps subsequent to the activation step of theembodiment 1 shown in FIG. 3C. Moreover, the structure of the completedTFT is approximately the same as that of the embodiment 1, which can betherefore referred to the explanation of the completed TFT in thisembodiment. The constitution according to this embodiment can beembodied in being freely combined with those according to any one of theembodiments 1 through 5.

[0179] Embodiment 8

[0180] In the embodiment 1, a resin film is used as the interlayerinsulating film 371, however, in this embodiment, an insulating filmcontaining silicon, specifically, a silicon oxide film is used. In thiscase, after the fabrication steps have been completed up to that shownin FIG. 3B, a protection film (in this embodiment, a silicon oxinitridefilm) of 100 to 200 nm in thickness is first formed so as to cover thegate electrode.

[0181] Next, in the same way as the step shown in FIG. 3C, theactivation step is carried out, and an interlayer insulating film (inthis embodiment, a silicon oxide film) of 800 nm to 1 μm in thickness issubsequently provided. In this embodiment, prior to forming theinterlayer insulating film, a heat treatment is carried out in anatmosphere containing 3 to 100% hydrogen at 350 to 500° C. forterminating dangling bonds in the active layer with excited hydrogenatoms.

[0182] After these steps, there are formed on the above interlayerinsulating film a source wiring and a drain wiring, which are coveredwith a passivation film. In this embodiment, a silicon nitride film or asilicon oxinitride film is used as the passivation film.

[0183] The constitution according to this embodiment can be implementedin being freely combined with those according to any one of theembodiments 1 through 7.

[0184] Embodiment 9

[0185] In this embodiment, explanation will be made by using FIG. 9about an example of sealing an EL element with a structure differentfrom that of the EL display device in the embodiment 1. The parts beingthe same as those shown in FIG. 8 are denoted by the same referencenumerals.

[0186] In this embodiment, as a cover material 1301, a plastic film isused with DLC films 1302 a and 1302 b respectively formed on both facesthereof. When the DLC films are formed on both faces of the plasticfilm, a roll-to-roll method can be employed by which the DLC films areformed with the plastic film wound onto a roll.

[0187] In this embodiment, on a substrate manufactured so far as the ELelement is provided thereon according to the manufacturing steps in theembodiment 1, a cover material 1301 is bonded by using a sealingmaterial 1303. The end of the cover material 1301 is sealed by a sealant1304. With respect to the sealing material 1303 and the sealant 1304,the same materials as those presented in the embodiment 1 can be used.

[0188] The constitution according to this embodiment can be implementedin being freely combined with those according to any one of theembodiments 1 through 8.

[0189] Embodiment 10

[0190] In this embodiment, an explanation will be made about circuitdiagram for the pixel structures shown in FIG. 5 in the embodiment 1,and the pixel structure shown in FIG. 11 in the embodiment 5. Here, acircuit diagrams corresponding to the structures shown in FIG. 5 andFIG. 11 are shown in FIG. 15A and FIG. 15B, respectively.

[0191] In FIG. 15A, reference numerals 340, 378, and 504 denote thesource wiring, the current supply line, and the gate wiring,respectively. The reference numerals correspond to those in FIG. 5.Furthermore, reference numerals 1501, 1502, 1503, and 1504 denote aswitching TFT corresponding to that shown in FIG. 6A, a currentcontrolling TFT corresponding to that shown in FIG. 6B, a holdingcapacitor corresponding to that shown in FIG. 6C, and an EL element,respectively.

[0192] Digital driving of the pixel described in this embodiment can becarried out according to the driving method disclosed in JP2000-114592.

[0193] In FIG. 15B, reference numerals 1203, 1207, and 1202 denote asource wiring, a current supply line, and a gate wiring, respectively.The reference numerals correspond to those in FIG. 11. Furthermore,reference numerals 1505, 1506, 1507, 1508, and 1509 denote a switchingTFT corresponding to that shown in FIG. 12A, a current controlling TFTcorresponding to that shown in FIG. 12B, a holding capacitorcorresponding to that shown in FIG. 12C, an EL element, and an erasingTFT, respectively.

[0194] Digital driving of the pixel in this embodiment can be carriedout according to the driving method disclosed in JP11-338786.

[0195] The constitution according to this embodiment can be implementedin being freely combined with those according to any one of theembodiments 1 through 9.

[0196] Embodiment 11

[0197]FIG. 16 shows an example of a film forming device to form the ELelement in carrying out the present invention. In this embodiment, acase in which an in-line type film forming device is used as the filmforming device is explained. In FIG. 16, numeral 801 indicates a loadchamber and a substrate 80 is delivered from this load chamber 801. Theload chamber 801 is provided with an exhaust system 800 a and theexhaust system 800 a is constituted of a first valve 81, aturbo-molecular pump 82, a second valve 83 and a rotary pump (hydraulicrotary pump) 84.

[0198] The first valve 81 constitutes a main valve and works also as aconductance valve in some cases and also works as a butterfly valve insome other cases. The second valve 83 is a fore valve. In operation,first of all, the second valve 83 is opened and the pressure inside theload chamber 801 is roughly reduced by the rotary pump 84. Subsequently,the first valve 81 is opened and the pressure inside the load chamber801 is reduced to the high vacuum state by the turbo molecular pump 82.Although a mechanical booster pump or a cryopump can be used in place ofthe turbo molecular pump, the cryopump is particularly effective in theremoval of the moisture.

[0199] Subsequently, numeral 802 indicates a preprocessing chamber forprocessing a surface of an anode or a cathode (cathode in thisembodiment) of the EL element. The preprocessing chamber 802 is providedwith an exhaust system 800 b. Further, the preprocessing chamber 802 ishermetically shielded from the load chamber 801 by a gate not shown inthe drawing. The preprocessing chamber 802 may be changed in variousforms depending on the fabrication process of the EL element.

[0200] As the preprocessing, ozone plasma processing, oxygen plasmaprocessing, argon plasma processing, neon plasma processing, heliumplasma processing or hydrogen plasma processing can be performed.Further, with the provision of a heater, the heating can be performedsimultaneous with the plasma processing. Still further, with theprovision of an ultraviolet ray lamp, the irradiation of ultravioletrays can be performed.

[0201] In this embodiment, the argon plasma processing is performed on asurface of the cathode made of a metal film while heating the substrateat a temperature of 100° C. and hence, the preprocessing which enablesthe removal of moisture and the removal of an oxide film naturallyformed on a surface of the electrode can be carried out simultaneously.

[0202] Subsequently, numeral 803 indicates a vapor deposition chamberfor forming a film of organic material by a vapor deposition method andthis chamber is called as a vapor deposition chamber (A). The vapordeposition chamber (A) 803 is provided with an exhaust system 800 c.Further, the vapor deposition chamber (A) 803 is hermetically shieldedfrom the preprocessing chamber 802 by a gate not shown in the drawing.In this embodiment, the electron injection layer is formed in the vapordeposition chamber (A) 803.

[0203] Subsequently, numeral 804 indicates a vapor deposition chamberfor forming a film of organic material by a vapor deposition method andthis chamber is called as a vapor deposition chamber (B). The vapordeposition chamber (B) 804 is provided with an exhaust system 800 d.Further, the vapor deposition chamber (B) 804 is hermetically shieldedfrom the vapor deposition chamber (A) 803 by a gate not shown in thedrawing. In this embodiment, an electron transport layer is formed inthe vapor deposition chamber (B) 804.

[0204] Subsequently, numeral 805 indicates a vapor deposition chamberfor forming a film of organic EL material by a vapor deposition methodand this chamber is called as a vapor deposition chamber (C). The vapordeposition chamber (C) 805 is provided with an exhaust system 800 e.Further, the vapor deposition chamber (C) 805 is hermetically shieldedfrom the vapor deposition chamber (B) 804 by a gate not shown in thedrawing. In this embodiment, a light emitting layer which emits redlight is formed in the vapor deposition chamber (C) 805.

[0205] Subsequently, numeral 806 indicates a vapor deposition chamberfor forming a film of organic EL material by a vapor deposition methodand this chamber is called as a vapor deposition chamber (D). The vapordeposition chamber (D) 806 is provided with an exhaust system 800 f.Further, the vapor deposition chamber (D) 806 is hermetically shieldedfrom the vapor deposition chamber (C) 805 by a gate not shown in thedrawing. In this embodiment, a light emitting layer which emits greenlight is formed in the vapor deposition chamber (D) 806.

[0206] Subsequently, numeral 807 indicates a vapor deposition chamberfor forming a film of organic EL material by a vapor deposition methodand this chamber is called as a vapor deposition chamber (E). The vapordeposition chamber (E) 807 is provided with an exhaust system 800 g.Further, the vapor deposition chamber (E) 807 is hermetically shieldedfrom the vapor deposition chamber (D) 806 by a gate not shown in thedrawing. In this embodiment, a light emitting layer which emits bluelight is formed in the vapor deposition chamber (E) 807.

[0207] Subsequently, numeral 808 indicates a vapor deposition chamberfor forming a film of organic material by a vapor deposition method andthis chamber is called as a vapor deposition chamber (F). The vapordeposition chamber (F) 808 is provided with an exhaust system 800 h.Further, the vapor deposition chamber (F) 808 is hermetically shieldedfrom the vapor deposition chamber (E) 807 by a gate not shown in thedrawing. In this embodiment, a hole transport layer is formed in thevapor deposition chamber (F) 808.

[0208] Subsequently, numeral 809 indicates a vapor deposition chamberfor forming a film of organic material by a vapor deposition method andthis chamber is called as a vapor deposition chamber (G). The vapordeposition chamber (G) 809 is provided with an exhaust system 800 i.Further, the vapor deposition chamber (G) 809 is hermetically shieldedfrom the vapor deposition chamber (F) 808 by a gate not shown in thedrawing. In this embodiment, a hole injection layer is formed in thevapor deposition chamber (G) 809.

[0209] Subsequently, numeral 810 indicates a vapor deposition chamberfor forming a conductive film which constitutes an anode or a cathode ofthe EL element (oxide conductive film which constitutes the anode inthis embodiment) by a vapor deposition method and this chamber is calledas a vapor deposition chamber (H). The vapor deposition chamber (H) 810is provided with an exhaust system 800 j. Further, the vapor depositionchamber (H) 810 is hermetically shielded from the vapor depositionchamber (G) 809 by a gate not shown in the drawing.

[0210] In this embodiment, an oxide conductive film which dopes oxidegallium into zinc oxide is formed in the vapor deposition chamber (H)810 as an oxide conductive film which constitutes the anode of the ELelement.

[0211] Subsequently, numeral 811 indicates a seal chamber which isprovided with an exhaust system 800 k. Further, the seal chamber 811 ishermetically shielded from the vapor deposition chamber (H) 810 by agate not shown in the drawing. In the seal chamber 811, as a passivationfilm which protects the EL element from oxygen and moisture, a DLC(Diamond-like Carbon) film is formed. It is needless to say that asilicon nitride film or a silicon nitride-oxide film (SiON film) can beformed.

[0212] A sputter method or a plasma CVD method may be used for formingthe DLC film. Since the DLC film can be formed in a temperature rangefrom a room temperature to not more than 100° C., it is preferable asthe passivation film which protects the EL element having a low heatresistance. Further, since the DLC film exhibits the high thermalconductivity and the heat radiation effect, the DLC film can expect aneffect to suppress the thermal deterioration of the EL element. In thisembodiment, it is also effective to use the DLC film in a form that asilicon nitride film or a silicon carbide film is laminated to the DLCfilm.

[0213] Further, the DLC film may be doped with fluorine or hydrogen.Further, by setting the oxygen concentration in the DLC film to not morethan 1×10¹⁸ atoms/cm³, it becomes possible to reduce the permeability ofthe oxygen.

[0214] Finally, numeral 812 indicates an unload chamber and this chamberis provided with an exhaust system 8001. The substrate on which the ELelement is formed is taken out from this chamber.

[0215] As mentioned above, with the use of the film forming device shownin FIG. 20, it becomes possible to prevent the EL element from beingexposed to the outside air until the EL element is completely sealed inthe hermetically sealed space and hence, the EL display device havinghigh reliability can be fabricated. Further, the EL display device canbe fabricated with high throughput by an in-line system.

[0216] Further, it is effective to operate respective processingchambers, the exhaust systems and the transport system of the filmforming device described in this embodiment under a computer control. Inthis embodiment, since the EL element is completed by continuouslyperforming a series of processing, it becomes possible to perform thecomputer control from the supply of the substrate to the take-out of thesubstrate.

[0217] The EL display device having any one of the constitutionsdescribed in the embodiments 1 to 10 may be fabricated with the use ofthe film forming device described in this embodiment.

[0218] Embodiment 12

[0219] In the invention, an external light emitting quantum efficiencycan be remarkably improved by using an EL material by whichphosphorescence from a triplet exciton can be employed for emittinglight. As a result, the power consumption of the EL element can bereduced, the lifetime of the EL element can be elongated and the weightof the EL element can be lightened.

[0220] The following is a report where the external light emittingquantum efficiency is improved by using the triplet exciton (T. Tsutsui,C. Adachi, S. Saito, Photochemical Processes in Organized MolecularSystems, ed. K. Honda, (Elsevier Sci. Pub., Tokyo, 1991) p. 437).

[0221] The molecular formula of an EL material (coumarin pigment)reported by the above article is represented as follows.

[0222] (M. A. Baldo, D. F. O'Brien, Y. You, A. Shoustikov, S. Sibley, M.E. Thompson, S. R. Forrest, Nature 395 (1998) p.151)

[0223] The molecular formula of an EL material (Pt complex) reported bythe above article is represented as follows.

[0224] (M. A. Baldo, S. Lamansky, P. E. Burrows, M. E. Thompson, S. R.Forrest, Appl. Phys. Lett., 75 (1999) p.4.) (T. Tsutsui, M. -J. Yang, M.Yahiro, K. Nakamura, T. Watanabe, T. Tsuji, Y. Fukuda, T. Wakimoto, S.Mayaguchi, Jpn, Appl. Phys., 38 (12B) (1999) L1502.)

[0225] The molecular formula of an EL material (Ir complex) reported bythe above article is represented as follows.

[0226] As described above, if phosphorescence from a triplet exciton canbe put to practical use, it can realize the external light emittingquantum efficiency three to four times as high as that in the case ofusing fluorescence from a singlet exciton in principle. Note that theconstitution of this embodiment can be freely implemented in combinationof any structures of the embodiments 1 to 11.

[0227] Embodiment 13

[0228] In this embodiment, a specific example of the EL element 383 ofthe embodiment 1 shown in FIG. 4(B) is explained in conjunction withFIG. 17. The structural example of the EL element described in thisembodiment corresponds to an example which enlarges a portion of the ELelement 383 shown in FIG. 4(B). In this embodiment, as material whichconstitutes the EL layer, known organic material or inorganic materialcan be used. Further, either high-molecular material or thelow-molecular material can be used.

[0229] First of all, FIG. 17(A) shows an EL element having a structureformed by laminating an electron injection layer 12, an electrontransport layer 13, a light emitting layer 14, a hole transport layer15, a hole injection layer 16 and an anode 17 on a cathode (pixelelectrode) 11. Here, the light emitting layer 14 may be formed of threekinds of light emitting layers in a film form which respectivelycorrespond to red, green and blue.

[0230] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802, the electron injection layer12 is formed in the vapor deposition chamber (A) 803, the electrontransport layer 13 is formed in the vapor deposition chamber (B) 804,the light emitting layer 14 is formed in the vapor deposition chamber(C) 805 to the vapor deposition chamber (E) 807, the hole transportlayer 15 is formed in the vapor deposition chamber (F) 808, the holeinjection layer 16 is formed in the vapor deposition chamber (G) 809,and the anode 17 is formed in the vapor deposition chamber (H) 810.

[0231] Then, FIG. 17(B) shows an EL element having a structure formed bylaminating an electron injection layer 12, an electron transport layer13, a light emitting layer 14, a hole injection layer 16 and an anode 17on a cathode (pixel electrode) 11. Here, the light emitting layer 14 maybe formed of three kinds of light emitting layers in a film form whichrespectively correspond to red, green and blue.

[0232] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802, the electron injection layer12 is formed in the vapor deposition chamber (A) 803, the electrontransport layer 13 is formed in the vapor deposition chamber (B) 804,and the light emitting layer 14 is formed in the vapor depositionchamber (C) 805 to the vapor deposition chamber (E) 807. Then, afterpassing the vapor deposition chamber (F) 808, the hole injection layer16 is formed in the vapor deposition chamber (G) 809, and the anode 17is formed in the vapor deposition chamber (H) 810.

[0233] Then, FIG. 17(C) shows an EL element having a structure formed bylaminating an electron injection layer 12, a light emitting layer 14, ahole transport layer 15, a hole injection layer 16 and an anode 17 on acathode (pixel electrode) 11. Here, the light emitting layer 14 may beformed of three kinds of light emitting layers in a film form whichrespectively correspond to red, green and blue.

[0234] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802 and the electron injectionlayer 12 is formed in the vapor deposition chamber (A) 803. Then, afterpassing the vapor deposition chamber (B) 804, the light emitting layer14 is formed in the vapor deposition chamber (C) 805 to the vapordeposition chamber (E) 807, the hole transport layer 15 is formed in thevapor deposition chamber (F) 808, the hole injection layer 16 is formedin the vapor deposition chamber (G) 809, and the anode 17 is formed inthe vapor deposition chamber (H) 810.

[0235] Then, FIG. 17(D) shows an EL element having a structure formed bylaminating an electron injection layer 12, a light emitting layer 14, ahole injection layer 16 and an anode 17 on a cathode (pixel electrode)11. Here, the light emitting layer 14 may be formed of three kinds oflight emitting layers in a film form which respectively correspond tored, green and blue.

[0236] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802 and the electron injectionlayer 12 is formed in the vapor deposition chamber (A) 803. Then, afterpassing the vapor deposition chamber (B) 804, the light emitting layer14 is formed in the vapor deposition chamber (C) 805 to the vapordeposition chamber (E) 807. Then, after passing the vapor depositionchamber (F) 808, the hole injection layer 16 is formed in the vapordeposition chamber (G) 809, and the anode 17 is formed in the vapordeposition chamber (H) 810.

[0237] Then, FIG. 17(E) shows an EL element having a structure formed bylaminating clusters 18, an electron transport layer 13, a light emittinglayer 14, a hole transport layer 15, a hole injection layer 16 and ananode 17 on a cathode (pixel electrode) 11. Here, the light emittinglayer 14 may be formed of three kinds of light emitting layers in a filmform which respectively correspond to red, green and blue. Further, theclusters 18 are provided for lowering the work function of the cathode11 and are formed by providing an element belonging to a group 1 or agroup 2 of the periodic table in a cluster shape in this embodiment.

[0238] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802, the clusters 18 are formedin the vapor deposition chamber (A) 803, the electron transport layer 13is formed in the vapor deposition chamber (B) 804, the light emittinglayer 14 is formed in the vapor deposition chamber (C) 805 to the vapordeposition chamber (E) 807, the hole transport layer 15 is formed in thevapor deposition chamber (F) 808, the hole injection layer 16 is formedin the vapor deposition chamber (G) 809, and the anode 17 is formed inthe vapor deposition chamber (H) 810.

[0239] Then, FIG. 17(F) shows an EL element having a structure formed bylaminating clusters 18, an electron transport layer 13, a light emittinglayer 14, a hole injection layer 16 and an anode 17 on a cathode (pixelelectrode) 11. Here, the light emitting layer 14 may be formed of threekinds of light emitting layers in a film form which respectivelycorrespond to red, green and blue.

[0240] In this embodiment, the preprocessing of the cathode 11 isperformed in the preprocessing chamber 802, the clusters 18 are formedin the vapor deposition chamber (A) 803, the electron transport layer 13is formed in the vapor deposition chamber (B) 804 and the light emittinglayer 14 is formed in the vapor deposition chamber (C) 805 to the vapordeposition chamber (E) 807. Then, after passing the vapor depositionchamber (F) 808, the hole injection layer 16 is formed in the vapordeposition chamber (G) 809 and the anode 17 is formed in the vapordeposition chamber (H) 810.

[0241] As described above, even when the EL elements having variousstructures are formed, they can be easily fabricated using the filmforming device shown in FIG. 16. The constitutions shown in thisembodiment can be carried out in combination with any one ofconstitutions described in the embodiment 1 to the embodiment 12.

[0242] Embodiment 14

[0243] A light emitting device formed by implementing the presentinvention has superior visibility in bright locations in comparison to aliquid crystal display device because it is a self-emissive type device,and moreover its field of vision is wide. Accordingly, it can be used asa display portion for various electric appliances. At the time, althoughthe light emitting device of the present invention is a passive typelight emitting device, large screen can be realized by reducing thewiring resistance, thereby the light emitting device has many uses.

[0244] The following can be given as examples of such electricappliances of the present invention: a video camera; a digital camera; agoggle type display (head mounted display); a car navigation system; acar audio system; a notebook personal computer; a game equipment; aportable information terminal (such as a mobile computer, a mobiletelephone, a mobile game equipment or an electronic book); and an imageplayback device provided with a recording medium (specifically, a devicewhich performs playback of a recording medium and is provided with adisplay which can display those images, such as a compact disk (CD), alaser disk, or a digital versatile disk (DVD). Examples of theseelectric appliances are shown in FIGS. 18 and 19.

[0245]FIG. 18A shows an EL display, containing a casing 2001, a supportstand 2002, and a display portion 2003. The light emitting device of thepresent invention can be used in the display portion 2003. Since the ELdisplay is a self-emissive type device with no need of a backlight, itsdisplay portion can be made thinner than a liquid crystal displaydevice.

[0246]FIG. 18B shows a video camera, containing a main body 2101, adisplay portion 2102, an audio input portion 2103, operation switches2104, a battery 2105, and an image receiving portion 2106. The lightemitting device of the present invention can be used in the displayportion 2102.

[0247]FIG. 18C shows a digital camera, containing a main body 2201, adisplay portion 2202, a view finder portion 2203, and operation switches2204. The light emitting device of the present invention can be used inthe display portion 2202.

[0248]FIG. 18D shows an image playback device (specifically, a DVDplayback device) provided with a recording medium, containing a mainbody 2301, a recording medium (such as CD, LD and DVD) 2302, operationswitches 2303, a display portion (a) 2304, and a display portion (b)2305. The display portion (a) 2304 is mainly used for displaying imageinformation, and the display portion (b) 2305 is mainly used fordisplaying character information, and the light emitting device of thepresent invention can be used in the display portions (a) and (b). Notethat a CD reproducing device, a game equipment, or the like is includedas the image reproducing device provided with a recording medium.

[0249]FIG. 18E shows a portable (mobile) computer, containing a mainbody 2401, a display portion 2402, an image receiving portion 2403,operation switches 2404, and a memory slot 2405. The electro opticaldevice of the present invention can be used as the display portion 2402.This portable computer can record or play back information in therecording medium which is an accumulation of flash memory or nonvolatilememory.

[0250]FIG. 18F shows a personal computer, containing a main body 2501, acasing 2502, a display portion 2503, and a keyboard 2504. The lightemitting device of the present invention can be used as the displayportion 2503.

[0251] Note that if the luminance of an EL material increases in thefuture, then it will become possible to use the light emitting device ofthe present invention in a front type or a rear type projector byexpanding and projecting light containing output image information witha lens or the like.

[0252] Further, the above electronic devices display often informationtransmitted through an electronic communication circuit such as theInternet and CATV (cable TV), and particularly situations of displayingmoving images is increasing. Since the response speed of EL materials isvery high, the light emitting device is suitable for performinganimation display.

[0253] In addition, since the light emitting device consumes power inthe light emitting portion, it is preferable to display information soas to make the light emitting portion as small as possible.Consequently, when using the light emitting device in a display portionmainly for character information, such as in a portable informationterminal, in particular a portable telephone or a car audio stereo, itis preferable to drive the light emitting device so as to form characterinformation by the light emitting portions while non-light emittingportions are set as background.

[0254]FIG. 19A shows a portable telephone, containing a main body 2601,a sound output portion 2602, a sound input portion 2603, a displayportion 2604, operation switches 2605, and an antenna 2606. The lightemitting device of the present invention can be used as the displayportion 2604. Note that the display portion 2604 can suppress the powerconsumption of the portable telephone by displaying white colorcharacters in a black color background.

[0255]FIG. 19B shows a car audio stereo, containing a main body 2701, adisplay portion 2702, and operation switches 2703 and 2704. The lightemitting device of the present invention can be used as the displayportion 2702. Further, a car mounting audio stereo is shown in thisembodiment, but a fixed type audio playback device may also be used.Note that, by displaying white color characters in a black colorbackground, the display portion 2704 can suppress the power consumption.

[0256] As described above, the application range of this invention isextremely wide, and it may be used for electric appliances in variousfields. Further, the electric appliances of this embodiment may beobtained by using a light emitting device freely combining thestructures of the embodiments 1 to 13.

[0257] As has been described heretofore, by carrying out the presentinvention, the TFT can be fabricated with the fabrication steps whichincludes the least photolithography steps so that the yield ofactive-matrix type light emitting devices using TFTs can be enhanced.Further, the fabrication period of the light emitting devices can beshortened and it becomes possible to provide inexpensive light emittingdevices by reducing the fabrication cost. Still further, it becomespossible to provide inexpensive electric appliances using suchinexpensive light emitting devices.

What we claim is:
 1. A light emitting device having pixels each of which is provided with an n-channel type TFT, a light emitting element, a passivation film which covers the light emitting element and a coloring layer disposed over the passivation film, the n-channel type TFT comprising: an active layer which includes a channel forming region, an n-type impurity region (c) being in contact with the channel forming region, an n-type impurity region (b) being in contact with the n-type impurity region (c) and an n-type impurity region (a) being in contact with the n-type impurity region (b); and a gate electrode which includes a first gate electrode and a second gate electrode having a contour smaller than a contour of the first gate electrode, wherein the first gate electrode is superposed over the channel forming region and the n-type impurity region (c) while sandwiching a gate insulation film therebetween, and the second gate electrode is superposed over the channel forming region while sandwiching the gate insulation film therebetween.
 2. A device according to claim 1, wherein the first gate electrode is made of tantalum nitride or titanium nitride and the second gate electrode is made of tungsten or aluminum alloy.
 3. A device according to claim 1, wherein the n-type impurity region (a) contains an n-type impurity element at the concentration of 1×10²⁰-1×10²¹ atoms/cm³, the n-type impurity region (b) contains an n-type impurity element at the concentration of 2×10¹⁶-5×10¹⁹ atoms/cm³, and the n-type impurity region (c) contains an n-type impurity element at the concentration of 1×10¹⁶-1××10¹⁸ atoms/cm³.
 4. A device according to claim 1, wherein the gate electrode is covered with an insulation film which is laminated with a silicon oxide nitride film and a resin film.
 5. A device according to claim 1 wherein the gate electrode is covered with an insulation film which is laminated with a silicon nitride film and a resin film.
 6. A device according to claim 1, wherein an outermost surface of a wiring which is connected to the n-channel type TFT is made of a metal film including an element selected from a group 1 or a group 2 of the periodic table or a bismuth film.
 7. A light emitting device having pixels each of which is provided with an n-channel type TFT, a light emitting element electrically connected to the n-channel type TFT, a passivation film which covers the light emitting element and a coloring layer disposed over the passivation film, the n-channel type TFT comprising: an active layer which includes a channel forming region, an n-type impurity region (c) being in contact with the channel forming region, an n-type impurity region (b) being in contact with the n-type impurity region (c) and an n-type impurity region (a) being in contact with the n-type impurity region (b); and a gate electrode which includes a first gate electrode and a second gate electrode having a contour smaller than a contour of the first gate electrode, wherein the first gate electrode is superposed over the channel forming region and the n-type impurity region (c) while sandwiching a gate insulation film therebetween, and the second gate electrode is superposed over the channel forming region while sandwiching the gate insulation film therebetween.
 8. A device according to claim 7, wherein the first gate electrode is made of tantalum nitride or titanium nitride and the second gate electrode is made of tungsten or aluminum alloy.
 9. A device according to claim 7, wherein the n-type impurity region (a) contains an n-type impurity element at the concentration of 1×10²⁰-1×10²¹ atoms/cm³, the n-type impurity region (b) contains an n-type impurity element at the concentration of 2×10¹⁶-5×10¹⁹ atoms/cm³, and the n-type impurity region (c) contains an n-type impurity element at the concentration of 1×10¹⁶-1×10¹⁸ atoms/cm³.
 10. A device according to claim 7, wherein the gate electrode is covered with an insulation film which is laminated with a silicon oxide nitride film and a resin film.
 11. A device according to claim 7 wherein the gate electrode is covered with an insulation film which is laminated with a silicon nitride film and a resin film.
 12. A device according to claim 7, wherein an outermost surface of a wiring which is connected to the n-channel type TFT is made of a metal film including an element selected from a group 1 or a group 2 of the periodic table or a bismuth film.
 13. A device according to claim 7, wherein the passivation film is made of an insulation film selected from a group including a carbon film, a silicon nitride film and a silicon nitride-oxide film.
 14. A method for fabricating a light emitting device comprising: a first step of forming a semiconductor film over an insulation body; a second step of forming an insulation film which covers the semiconductor film; a third step of forming a conductive film formed by laminating two or more conductive films over the insulation film; a fourth step of forming a gate electrode by etching the conductive film; a fifth step of doping the semiconductor film with an n-type impurity element using the gate electrode as a mask; a sixth step of selectively etching a portion of the gate electrode after a side surface of the gate electrode is etched; a seventh step of doping an n-type impurity element into the semiconductor film using a portion of the gate electrode on which the conductive films are laminated in two or more layers as a mask after completing the sixth step, by allowing the n-type impurity element to pass through a portion of the gate electrode; an eighth step of forming an insulation film which covers the gate electrode; a ninth step of forming a wiring which is brought into contact with the semiconductor film over the insulation film formed in the eighth step; a tenth step of forming a light emitting element over the insulation film formed in the eighth step; and an eleventh step of forming a passivation film over the light emitting element.
 15. A method according to claim 14, wherein the conductive film is formed by laminating a tungsten film or an aluminum alloy film over a tantalum nitride film or a titanium nitride film.
 16. A method according to claim 14, wherein the insulation film formed in the eighth step is made of a silicon nitride film or a silicon nitride-oxide film and a resin film.
 17. A method according to claim 14, wherein the passivation film includes a carbon film, a silicon nitride film or a silicon nitride-oxide film.
 18. A method according to claim 14, wherein an outermost surface of the wiring is made of a metal film including an element selected from a group 1 or a group 2 of the periodic table or a bismuth film.
 19. A method according to claim 14, wherein the gate electrode formed in the fourth step has a tapered shape.
 20. A method for fabricating a light emitting device comprising: a first step of forming a semiconductor film over an insulation body; a second step of forming an insulation film which covers the semiconductor film; a third step of forming a conductive film formed by laminating a first conductive film and a second conductive film over the insulation film; a fourth step of forming a first gate electrode made of the first conductive film and a second gate electrode made of the second conductive film are formed by etching the first and second conductive films; a fifth step of doping the semiconductor film with an n-type impurity element using the first gate electrode and the second gate electrode as masks; a sixth step of etching the first gate electrode and the second gate electrode to narrow a line width thereof and thereafter selectively etching the second gate electrode; a seventh step of doping an n-type impurity element into the semiconductor film using the second gate electrode as a mask after completing the sixth step, by allowing the n-type impurity element to pass through a portion of the first gate electrode; an eighth step of forming an insulation film which covers the gate electrodes; a ninth step of forming a wiring which is brought into contact with the semiconductor film over the insulation film formed in the eighth step; a tenth step of forming a light emitting element over the insulation film formed in the eighth step; and an eleventh step of forming a passivation film over the light emitting element.
 21. A method according to claim 20, wherein a tantalum nitride film or a titanium nitride film is used as the first conductive film and a tungsten film or an aluminum alloy film is used as the second conductive film.
 22. A method according to claim 20, wherein the first gate electrode and the second gate electrode formed in the fourth step have a tapered shape.
 23. A method according to claim 20, wherein the insulation film formed in the eighth step is made of a silicon nitride film or a silicon nitride-oxide film and a resin film.
 24. A method according to claim 20, wherein the passivation film includes a carbon film, a silicon nitride film or a silicon nitride-oxide film.
 25. A method according to claim 20, wherein an outermost surface of the wiring is made of a metal film including an element selected from a group 1 or a group 2 of the periodic table or a bismuth film. 